Cycle-accurate model of tt_um_mc14500b_soc_extended (1-bit ICU, 64-byte program RAM, free-running PC, edge detector, clock divider, output shift latch) with runnable examples.
uo_out[7:0] (brightness = fraction of time high, like persistence of vision)
ui_in[0] feeds the rising-edge detector (address 8). ui_in[7:5] are read at addresses D/E/F, one clock late. ui_in[4:1] are not connected to the core.
Mnemonics: NOP LD LDC AND ANDC OR ORC XNOR STO STOC IEN OEN JMP SKZ NOPE NOPF. Operands: 0–15 or R0–R7, EDGE(8), SLOW(9), ZERO(A), OUT(C), IN5/IN6/IN7(D/E/F). Padded with NOP to 64 bytes. rst_n also clears program RAM, so Assemble & run does reset → program mode writes → run.